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Searched refs:VLV_WM_LEVEL_DDR_DVFS (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_pm.c1584 dev_priv->wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33; in vlv_setup_wm_latency()
1586 dev_priv->wm.max_level = VLV_WM_LEVEL_DDR_DVFS; in vlv_setup_wm_latency()
1796 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); in vlv_raw_plane_wm_compute()
2116 if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_DDR_DVFS)) in vlv_program_watermarks()
2133 if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_DDR_DVFS)) in vlv_program_watermarks()
5642 wm->level = VLV_WM_LEVEL_DDR_DVFS; in vlv_wm_get_hw_state()
H A Dintel_drv.h522 VLV_WM_LEVEL_DDR_DVFS, enumerator