Home
last modified time | relevance | path

Searched refs:VLV_WM_LEVEL_PM5 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_pm.c1583 dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12; in vlv_setup_wm_latency()
1795 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], in vlv_raw_plane_wm_compute()
2119 if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5)) in vlv_program_watermarks()
2130 if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5)) in vlv_program_watermarks()
5619 wm->level = VLV_WM_LEVEL_PM5; in vlv_wm_get_hw_state()
5638 dev_priv->wm.max_level = VLV_WM_LEVEL_PM5; in vlv_wm_get_hw_state()
H A Dintel_drv.h521 VLV_WM_LEVEL_PM5, enumerator