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Searched refs:VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h5300 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT 0x1 macro
H A Dgmc_8_2_sh_mask.h6422 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT 0x1 macro
H A Dgmc_6_0_sh_mask.h11815 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT 0x00000001 macro
H A Dgmc_7_1_sh_mask.h5942 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT 0x1 macro
H A Dgmc_8_1_sh_mask.h6544 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT 0x1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h7770 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT … macro
H A Dmmhub_9_1_sh_mask.h7433 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT … macro
H A Dmmhub_9_3_0_sh_mask.h7860 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6598 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT … macro
H A Dgc_9_1_sh_mask.h6512 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h6335 #define VM_L2_CNTL2__INVALIDATE_L2_CACHE__SHIFT … macro