Home
last modified time | relevance | path

Searched refs:VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_sh_mask.h6800 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT 0x0 macro
H A Dgmc_8_1_sh_mask.h6924 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h7938 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT macro
H A Dmmhub_9_1_sh_mask.h7601 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT macro
H A Dmmhub_9_3_0_sh_mask.h8028 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6766 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT macro
H A Dgc_9_1_sh_mask.h6680 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT macro
H A Dgc_9_2_1_sh_mask.h6503 #define VM_L2_CNTL4__L2_CACHE_4K_PARTITION_COUNT__SHIFT macro