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Searched refs:VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h5285 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK 0x38000 macro
H A Dgmc_8_2_sh_mask.h6407 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK 0x38000 macro
H A Dgmc_6_0_sh_mask.h11838 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK 0x00038000L macro
H A Dgmc_7_1_sh_mask.h5927 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK 0x38000 macro
H A Dgmc_8_1_sh_mask.h6529 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK 0x38000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h7763 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK … macro
H A Dmmhub_9_1_sh_mask.h7426 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h7853 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6591 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h6505 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h6328 #define VM_L2_CNTL__EFFECTIVE_L2_QUEUE_SIZE_MASK … macro