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Searched refs:VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h5268 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
H A Dgmc_8_2_sh_mask.h6390 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
H A Dgmc_6_0_sh_mask.h11841 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x00000000 macro
H A Dgmc_7_1_sh_mask.h5910 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
H A Dgmc_8_1_sh_mask.h6512 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h7740 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT … macro
H A Dmmhub_9_1_sh_mask.h7403 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT … macro
H A Dmmhub_9_3_0_sh_mask.h7830 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6568 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT … macro
H A Dgc_9_1_sh_mask.h6482 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h6305 #define VM_L2_CNTL__ENABLE_L2_CACHE__SHIFT … macro