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Searched refs:WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h15859 #define WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK 0x2 macro
H A Dgfx_8_0_sh_mask.h17999 #define WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK 0x2 macro
H A Dgfx_8_1_sh_mask.h18591 #define WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK 0x2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1387 #define WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h1349 #define WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h1312 #define WD_CNTL_STATUS__WD_SPL_DMA_BUSY_MASK … macro