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Searched refs:allowed_mclk_vdd_table (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dvega10_hwmgr.c750 struct phm_ppt_v1_clock_voltage_dependency_table *allowed_mclk_vdd_table = in vega10_set_private_data_based_on_pptable() local
758 PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table, in vega10_set_private_data_based_on_pptable()
760 PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table->count >= 1, in vega10_set_private_data_based_on_pptable()
766 allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].clk; in vega10_set_private_data_based_on_pptable()
770 allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].vddci; in vega10_set_private_data_based_on_pptable()
H A Dsmu7_hwmgr.c2081 struct phm_ppt_v1_clock_voltage_dependency_table *allowed_mclk_vdd_table = in smu7_set_private_data_based_on_pptable_v1() local
2091 PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table != NULL, in smu7_set_private_data_based_on_pptable_v1()
2094 PP_ASSERT_WITH_CODE(allowed_mclk_vdd_table->count >= 1, in smu7_set_private_data_based_on_pptable_v1()
2101 allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].clk; in smu7_set_private_data_based_on_pptable_v1()
2105 allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].vddci; in smu7_set_private_data_based_on_pptable_v1()