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Searched refs:alpha_en (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_dpp.c301 uint32_t alpha_en; in dpp1_cnv_setup() local
312 alpha_en = 1; in dpp1_cnv_setup()
347 alpha_en = 0; in dpp1_cnv_setup()
399 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp1_cnv_setup()
H A Ddcn10_dpp_dscl.c221 LB_DATA_FORMAT__ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ in dpp1_dscl_set_lb()
453 if (scl_data->lb_params.alpha_en in dpp1_dscl_calc_lb_num_partitions()
H A Ddcn10_hw_sequencer.c1997 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; in update_scaler()
/dragonfly/sys/dev/drm/amd/display/dc/inc/hw/
H A Dtransform.h154 bool alpha_en; member
/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_transform.c399 REG_UPDATE(LB_DATA_FORMAT, ALPHA_EN, data->lb_params.alpha_en); in dce_transform_set_scaler()
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c1457 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in apply_single_controller_ctx_to_hw()
2649 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce110_program_front_end_for_pipe()