/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
H A D | smu_helper.h | 130 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 134 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 143 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 148 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
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H A D | vega10_powertune.c | 811 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset); in vega10_program_didt_config_registers() 817 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset); in vega10_program_didt_config_registers() 823 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset); in vega10_program_didt_config_registers() 894 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL); in vega10_didt_set_mask() 901 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DB_EDC_CTRL); in vega10_didt_set_mask() 908 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TD_EDC_CTRL); in vega10_didt_set_mask() 915 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL); in vega10_didt_set_mask() 922 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DBR_EDC_CTRL); in vega10_didt_set_mask()
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H A D | smu8_hwmgr.c | 1518 now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, in smu8_print_clock_levels() 1530 now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, in smu8_print_clock_levels() 1653 uint32_t val = cgs_read_ind_register(hwmgr->device, in smu8_thermal_get_temperature() 1679 …uint32_t sclk_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGE… in smu8_read_sensor() 1681 …uint32_t uvd_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET… in smu8_read_sensor() 1683 …uint32_t vce_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET… in smu8_read_sensor() 1704 tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMUSVI_NB_CURRENTVID) & in smu8_read_sensor() 1710 tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMUSVI_GFX_CURRENTVID) & in smu8_read_sensor()
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H A D | smu7_hwmgr.c | 150 speedCntl = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__PCIE, in smu7_get_current_pcie_speed() 386 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_enable_display_gap() 513 tmp = (cgs_read_ind_register(hwmgr->device, in smu7_force_switch_to_arbf0() 1054 soft_register_value = cgs_read_ind_register(hwmgr->device, in smu7_disable_sclk_vce_handshake() 1070 soft_register_value = cgs_read_ind_register(hwmgr->device, in smu7_disable_handshake_uvd() 3514 tmp = cgs_read_ind_register(hwmgr->device, in smu7_get_gpu_power() 3554 activity_percent = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset); in smu7_read_sensor() 4265 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL); in smu7_read_clock_registers() 4267 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL_2); in smu7_read_clock_registers() 4269 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL_3); in smu7_read_clock_registers() [all …]
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H A D | smu7_powertune.c | 910 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset); in smu7_program_pt_config_registers() 914 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset); in smu7_program_pt_config_registers() 918 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset); in smu7_program_pt_config_registers()
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/dragonfly/sys/dev/drm/amd/include/ |
H A D | cgs_common.h | 135 …cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~C… 170 #define cgs_read_ind_register(dev,space,index) \ macro
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/dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 1693 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table() 1695 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table() 1752 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table() 1825 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in fiji_populate_clock_stretcher_data_table() 2390 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_uvd_smc_table() 2425 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_vce_smc_table() 2591 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2605 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2626 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2640 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings()
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H A D | polaris10_smumgr.c | 325 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_EFUSE_0 + (49*4)); in polaris10_is_hw_avfs_present() 1525 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in polaris10_populate_clock_stretcher_data_table() 1586 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in polaris10_populate_clock_stretcher_data_table() 2137 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_uvd_smc_table() 2172 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_vce_smc_table() 2438 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2452 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2473 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2487 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings()
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H A D | tonga_smumgr.c | 1587 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 1589 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 1656 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 1727 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 2679 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_uvd_smc_table() 2713 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_vce_smc_table() 3170 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings() 3184 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings() 3205 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings() 3219 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings()
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H A D | vegam_smumgr.c | 347 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_uvd_smc_table() 382 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_vce_smc_table() 1549 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in vegam_populate_clock_stretcher_data_table() 1560 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_is_hw_avfs_present()
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H A D | ci_smumgr.c | 190 && (0x20100 <= cgs_read_ind_register(hwmgr->device, in ci_is_smc_ram_running() 2791 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings() 2805 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings() 2826 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings() 2840 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings()
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H A D | smu7_smumgr.c | 163 && (0x20100 <= cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMC_PC_C))); in smu7_is_smc_ram_running()
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H A D | iceland_smumgr.c | 210 val = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_smu_upload_firmware_image()
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/dragonfly/sys/dev/drm/amd/display/dc/ |
H A D | dm_services.h | 100 return cgs_read_ind_register(ctx->cgs_device, addr_space, index); in dm_read_index_reg()
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