Searched refs:cik (Results 1 – 6 of 6) sorted by relevance
3217 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3234 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3251 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3270 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3300 rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; in cik_gpu_init()3308 rdev->config.cik.num_gpus = 1; in cik_gpu_init()3350 rdev->config.cik.tile_config |= in cik_gpu_init()3352 rdev->config.cik.tile_config |= in cik_gpu_init()3354 rdev->config.cik.tile_config |= in cik_gpu_init()3372 rdev->config.cik.active_cus = 0; in cik_gpu_init()[all …]
331 *value = rdev->config.cik.tile_config; in radeon_info_ioctl()386 rdev->config.cik.max_shader_engines; in radeon_info_ioctl()405 *value = rdev->config.cik.max_tile_pipes; in radeon_info_ioctl()425 *value = rdev->config.cik.backend_map; in radeon_info_ioctl()454 *value = rdev->config.cik.max_cu_per_sh; in radeon_info_ioctl()480 *value = rdev->config.cik.max_shader_engines; in radeon_info_ioctl()492 *value = rdev->config.cik.max_sh_per_se; in radeon_info_ioctl()527 value = rdev->config.cik.tile_mode_array; in radeon_info_ioctl()539 value = rdev->config.cik.macrotile_mode_array; in radeon_info_ioctl()551 *value = rdev->config.cik.backend_enable_mask; in radeon_info_ioctl()[all …]
73 cik.c \
1293 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; in dce4_crtc_do_set_base()1349 u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; in dce4_crtc_do_set_base()
803 struct cik_irq_stat_regs cik; member2210 struct cik_asic cik; member
2493 dev/drm/radeon/cik.c optional radeon drm compile-with "${NORMAL_C} -include $S/dev/drm/kconfig.h …