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Searched refs:clk_div (Results 1 – 1 of 1) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_dpll_mgr.c1687 clk_div->p1 = best_clock.p1; in bxt_ddi_hdmi_pll_dividers()
1688 clk_div->p2 = best_clock.p2; in bxt_ddi_hdmi_pll_dividers()
1690 clk_div->n = best_clock.n; in bxt_ddi_hdmi_pll_dividers()
1693 clk_div->m2_frac_en = clk_div->m2_frac != 0; in bxt_ddi_hdmi_pll_dividers()
1695 clk_div->vco = best_clock.vco; in bxt_ddi_hdmi_pll_dividers()
1704 *clk_div = bxt_dp_clk_val[0]; in bxt_ddi_dp_pll_dividers()
1707 *clk_div = bxt_dp_clk_val[i]; in bxt_ddi_dp_pll_dividers()
1712 clk_div->vco = clock * 10 / 2 * clk_div->p1 * clk_div->p2; in bxt_ddi_dp_pll_dividers()
1719 int vco = clk_div->vco; in bxt_ddi_set_dpll_hw_state()
1755 dpll_hw_state->ebb0 = PORT_PLL_P1(clk_div->p1) | PORT_PLL_P2(clk_div->p2); in bxt_ddi_set_dpll_hw_state()
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