Searched refs:core_dc (Results 1 – 8 of 8) sorted by relevance
/dragonfly/sys/dev/drm/amd/display/dc/core/ |
H A D | dc_stream.c | 181 struct dc *core_dc; in dc_stream_set_cursor_attributes() local 199 core_dc = stream->ctx->dc; in dc_stream_set_cursor_attributes() 213 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true); in dc_stream_set_cursor_attributes() 222 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false); in dc_stream_set_cursor_attributes() 232 struct dc *core_dc; in dc_stream_set_cursor_position() local 246 core_dc = stream->ctx->dc; in dc_stream_set_cursor_position() 262 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true); in dc_stream_set_cursor_position() 269 core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false); in dc_stream_set_cursor_position() 277 struct dc *core_dc = stream->ctx->dc; in dc_stream_get_vblank_counter() local 279 &core_dc->current_state->res_ctx; in dc_stream_get_vblank_counter() [all …]
|
H A D | dc_surface.c | 73 struct dc *core_dc = dc; in dc_create_plane_state() local 82 construct(core_dc->ctx, plane_state); in dc_create_plane_state() 102 struct dc *core_dc; in dc_plane_get_status() local 113 core_dc = plane_state->ctx->dc; in dc_plane_get_status() 115 if (core_dc->current_state == NULL) in dc_plane_get_status() 118 for (i = 0; i < core_dc->res_pool->pipe_count; i++) { in dc_plane_get_status() 120 &core_dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status() 125 core_dc->hwss.update_pending_status(pipe_ctx); in dc_plane_get_status()
|
H A D | dc_link.c | 2075 struct dc *core_dc = link->ctx->dc; in dc_link_set_backlight_level() local 2076 struct abm *abm = core_dc->res_pool->abm; in dc_link_set_backlight_level() 2102 if (core_dc->current_state->res_ctx. in dc_link_set_backlight_level() 2109 core_dc->current_state-> in dc_link_set_backlight_level() 2127 struct dc *core_dc = link->ctx->dc; in dc_link_set_abm_disable() local 2128 struct abm *abm = core_dc->res_pool->abm; in dc_link_set_abm_disable() 2140 struct dc *core_dc = link->ctx->dc; in dc_link_set_psr_enable() local 2471 core_dc->hwss.enable_stream(pipe_ctx); in core_link_enable_stream() 2476 core_dc->hwss.unblank_stream(pipe_ctx, in core_link_enable_stream() 2484 core_dc->hwss.blank_stream(pipe_ctx); in core_link_disable_stream() [all …]
|
H A D | dc_debug.c | 313 struct dc *core_dc = dc; in context_timing_trace() local 316 unsigned int underlay_idx = core_dc->res_pool->underlay_pipe_index; in context_timing_trace() 320 for (i = 0; i < core_dc->res_pool->pipe_count; i++) { in context_timing_trace() 333 for (i = 0; i < core_dc->res_pool->pipe_count; i++) { in context_timing_trace()
|
H A D | dc_resource.c | 2912 struct dc *core_dc = dc; in dc_validate_stream() local 2914 struct timing_generator *tg = core_dc->res_pool->timing_generators[0]; in dc_validate_stream()
|
/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_clocks.c | 281 struct dc *core_dc = ctx->dc; in dce_psr_set_clock() local 282 struct dmcu *dmcu = core_dc->res_pool->dmcu; in dce_psr_set_clock() 298 struct dc *core_dc = clk->ctx->dc; in dce112_set_clock() local 299 struct dmcu *dmcu = core_dc->res_pool->dmcu; in dce112_set_clock() 334 if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { in dce112_set_clock()
|
/dragonfly/sys/dev/drm/amd/display/dc/irq/dce110/ |
H A D | irq_service_dce110.c | 200 struct dc *core_dc = irq_service->ctx->dc; in dce110_vblank_set() local 208 core_dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; in dce110_vblank_set()
|
/dragonfly/sys/dev/drm/amd/display/dc/dce110/ |
H A D | dce110_hw_sequencer.c | 992 struct dc *core_dc = pipe_ctx->stream->ctx->dc; in dce110_enable_audio_stream() local 994 struct pp_smu_funcs_rv *pp_smu = core_dc->res_pool->pp_smu; in dce110_enable_audio_stream() 1000 if (core_dc->current_state->res_ctx.pipe_ctx[i].stream_res.audio != NULL) in dce110_enable_audio_stream()
|