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Searched refs:cp_hqd_pq_control (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/
H A Dcik_structs.h96 uint32_t cp_hqd_pq_control; member
H A Dvi_structs.h306 uint32_t cp_hqd_pq_control; member
H A Dv9_structs.h306 uint32_t cp_hqd_pq_control; member
/dragonfly/sys/dev/drm/radeon/
H A Dcik.c4490 u32 cp_hqd_pq_control; member
4693 mqd->queue_state.cp_hqd_pq_control = RREG32(CP_HQD_PQ_CONTROL); in cik_cp_compute_resume()
4694 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()
4697 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
4699 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
4702 mqd->queue_state.cp_hqd_pq_control |= BUF_SWAP_32BIT; in cik_cp_compute_resume()
4704 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()
4706 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
4708 WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control); in cik_cp_compute_resume()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v9.c461 2 << REG_GET_FIELD(m->cp_hqd_pq_control, in kgd_hqd_load()
H A Dgfx_v9_0.c2772 mqd->cp_hqd_pq_control = tmp; in gfx_v9_0_mqd_init()
2882 mqd->cp_hqd_pq_control); in gfx_v9_0_kiq_init_register()
H A Dgfx_v8_0.c4775 mqd->cp_hqd_pq_control = tmp; in gfx_v8_0_mqd_init()