| /dragonfly/sys/dev/drm/i915/ |
| H A D | intel_csr.c | 265 dev_priv->csr.dc_state = 0; in intel_csr_load_program()
276 struct intel_csr *csr = &dev_priv->csr; in parse_csr_fw() local
406 struct intel_csr *csr; in csr_load_work_fn() local
410 csr = &dev_priv->csr; in csr_load_work_fn()
422 dev_priv->csr.fw_path, in csr_load_work_fn()
429 csr->fw_path); in csr_load_work_fn()
446 struct intel_csr *csr = &dev_priv->csr; in intel_csr_ucode_init() local
454 csr->fw_path = I915_CSR_CNL; in intel_csr_ucode_init()
456 csr->fw_path = I915_CSR_GLK; in intel_csr_ucode_init()
458 csr->fw_path = I915_CSR_KBL; in intel_csr_ucode_init()
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| H A D | intel_runtime_pm.c | 522 dev_priv->csr.dc_state, val); in gen9_sanitize_dc_state()
523 dev_priv->csr.dc_state = val; in gen9_sanitize_dc_state()
532 state &= dev_priv->csr.allowed_dc_mask; in gen9_set_dc_state()
540 if ((val & mask) != dev_priv->csr.dc_state) in gen9_set_dc_state()
542 dev_priv->csr.dc_state, val & mask); in gen9_set_dc_state()
549 dev_priv->csr.dc_state = val & mask; in gen9_set_dc_state()
729 if (!dev_priv->csr.dmc_payload) in gen9_dc_off_power_well_disable()
2489 dev_priv->csr.allowed_dc_mask = in intel_power_domains_init()
2630 if (resume && dev_priv->csr.dmc_payload) in skl_display_core_init()
2695 if (resume && dev_priv->csr.dmc_payload) in bxt_display_core_init()
[all …]
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| H A D | i915_drv.c | 1668 suspend_to_idle(dev_priv) && dev_priv->csr.dmc_payload;
1900 !(dev_priv->suspended_to_idle && dev_priv->csr.dmc_payload))
2691 if (dev_priv->csr.dmc_payload &&
2692 (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
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| H A D | i915_drv.h | 2256 struct intel_csr csr; member
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| /dragonfly/sys/dev/netif/de/ |
| H A D | if_de.c | 1595 u_int bit, csr; in tulip_srom_idle() local
1599 csr ^= SROMCS; EMIT; in tulip_srom_idle()
1610 csr ^= SROMCS; EMIT; in tulip_srom_idle()
1611 csr = 0; EMIT; in tulip_srom_idle()
1654 csr = 0; EMIT; in tulip_srom_read()
1688 u_int csr; in tulip_mii_turnaround() local
1707 u_int csr, data, idx; in tulip_mii_readbits() local
1726 u_int csr; in tulip_mii_readreg() local
1744 u_int csr; in tulip_mii_writereg() local
2448 uint32_t csr; in tulip_read_macaddr() local
[all …]
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| H A D | if_devar.h | 39 #define TULIP_CSR_READ(sc, csr) \ argument
42 (sc)->tulip_csrs.csr)
43 #define TULIP_CSR_WRITE(sc, csr, val) \ argument
46 (sc)->tulip_csrs.csr, val)
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| /dragonfly/sys/dev/netif/mii_layer/ |
| H A D | lxtphy.c | 255 int bmcr, bmsr, csr; in lxtphy_status() local
265 csr = PHY_READ(sc, MII_LXTPHY_CSR); in lxtphy_status()
266 if (csr & CSR_LINK) in lxtphy_status()
286 if (csr & CSR_SPEED) in lxtphy_status()
290 if (csr & CSR_DUPLEX) in lxtphy_status()
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| /dragonfly/sys/dev/netif/wpi/ |
| H A D | if_wpi_debug.h | 103 static const char *wpi_get_csr_string(size_t csr) in wpi_get_csr_string() argument
105 switch (csr) { in wpi_get_csr_string()
122 KASSERT(0, ("Unknown CSR: %zu\n", csr)); in wpi_get_csr_string()
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| /dragonfly/sys/dev/misc/ppc/ |
| H A D | ppc.c | 745 outb(csr, 0xd); in ppc_smc37c66xgt_detect()
757 outb(csr, 0xd); in ppc_smc37c66xgt_detect()
775 outb(csr, 0x1); in ppc_smc37c66xgt_detect()
790 outb(csr, 0x1); in ppc_smc37c66xgt_detect()
794 outb(csr, 0x4); in ppc_smc37c66xgt_detect()
799 outb(csr, 0x1); in ppc_smc37c66xgt_detect()
814 outb(csr, 0x4); in ppc_smc37c66xgt_detect()
868 outb(csr, 0x4); in ppc_smc37c66xgt_detect()
894 outb(csr, 0xa); in ppc_smc37c66xgt_detect()
905 outb(csr, 0x4); in ppc_smc37c66xgt_detect()
[all …]
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| /dragonfly/sys/dev/netif/oce/ |
| H A D | oce_hw.c | 59 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
64 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc), post_status.dw0); in oce_POST()
74 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
455 ctrl.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_CONTROL); in oce_pci_soft_reset()
457 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_CONTROL, ctrl.dw0); in oce_pci_soft_reset()
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| /dragonfly/sys/platform/vkernel64/x86_64/ |
| H A D | npx.c | 72 #define ldmxcsr(csr) __asm __volatile("ldmxcsr %0" : : "m" (csr)) argument
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| /dragonfly/sys/platform/pc64/x86_64/ |
| H A D | npx.c | 73 #define ldmxcsr(csr) __asm __volatile("ldmxcsr %0" : : "m" (csr)) argument
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| /dragonfly/sys/dev/crypto/hifn/ |
| H A D | hifn7751.c | 1843 u_int32_t cmdlen, csr; in hifn_crypto() local
2119 csr = 0; in hifn_crypto()
2121 csr |= HIFN_DMACSR_C_CTRL_ENA; in hifn_crypto()
2125 csr |= HIFN_DMACSR_S_CTRL_ENA; in hifn_crypto()
2129 csr |= HIFN_DMACSR_R_CTRL_ENA; in hifn_crypto()
2133 csr |= HIFN_DMACSR_D_CTRL_ENA; in hifn_crypto()
2136 if (csr) in hifn_crypto()
2137 WRITE_REG_1(sc, HIFN_1_DMA_CSR, csr); in hifn_crypto()
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| /dragonfly/sys/netproto/802_11/wlan/ |
| H A D | ieee80211_ioctl.c | 2430 struct ieee80211_chanswitch_req csr; in ieee80211_ioctl_chanswitch() local
2434 if (ireq->i_len != sizeof(csr)) in ieee80211_ioctl_chanswitch()
2436 error = copyin(ireq->i_data, &csr, sizeof(csr)); in ieee80211_ioctl_chanswitch()
2444 csr.csa_chan.ic_freq, csr.csa_chan.ic_flags); in ieee80211_ioctl_chanswitch()
2449 ieee80211_csa_startswitch(ic, c, csr.csa_mode, csr.csa_count); in ieee80211_ioctl_chanswitch()
2450 else if (csr.csa_count == 0) in ieee80211_ioctl_chanswitch()
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| /dragonfly/contrib/ncurses/misc/ |
| H A D | terminfo.src | 391 csr=\E[%i%p1%d;%p2%dr, rc=\E8, sc=\E7,
907 csr=\E[%i%p1%d;%p2%dr, cub=\E[%p1%dD, cub1=^H,
2733 cnorm=\E[?25h, cr=\r, csr=\E[%i%p1%d;%p2%dr,
11227 csr=\E[%i%p1%d;%p2%dr, cuf1=\E[C,
11678 csr=\E[%i%p1%d;%p2%dr, cub=\E[%p1%dD$<1>,
18391 csr=\E[%i%p1%d;%p2%dr, cub=\E[%p1%dD$<5>,
19591 csr@, dl1=\E[1M, il1=\E[1L,
22769 csr@, ind=\E[1S, ri=\E[1T, use=ti924,
22772 csr@, ind=\2331S, ri=\2331T, use=ti924-8,
24612 # * Fixed malformed ampex csr.
[all …]
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| /dragonfly/sbin/ifconfig/ |
| H A D | ifieee80211.c | 786 struct ieee80211_chanswitch_req csr; in set80211chanswitch() local
788 getchannel(s, &csr.csa_chan, val); in set80211chanswitch()
789 csr.csa_mode = 1; in set80211chanswitch()
790 csr.csa_count = 5; in set80211chanswitch()
791 set80211(s, IEEE80211_IOC_CHANSWITCH, 0, sizeof(csr), &csr); in set80211chanswitch()
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| /dragonfly/contrib/dhcpcd/src/ |
| H A D | dhcp.c | 569 const char *csr = ""; in get_option_routes() local
581 csr = "MS "; in get_option_routes()
591 ifp->name, csr); in get_option_routes()
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| /dragonfly/sys/bus/cam/scsi/ |
| H A D | scsi_ch.c | 201 struct changer_element_status_request *csr);
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| /dragonfly/share/terminfo/ |
| H A D | Makefile.entries | 199 a/ansi+csr \
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| /dragonfly/contrib/ncurses/include/ |
| H A D | Caps | 328 change_scroll_region csr str cs - - YBCGE change region to line #1 to line #2 (P)
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| /dragonfly/sys/dev/netif/iwn/ |
| H A D | if_iwn.c | 9107 static char *iwn_get_csr_string(int csr) argument
9109 switch (csr) {
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