Searched refs:ctrl_register (Results 1 – 3 of 3) sorted by relevance
/dragonfly/sys/dev/sound/pci/ |
H A D | hdspe-pcm.c | 226 sc->ctrl_register |= (HDSPE_AUDIO_INT_ENABLE | HDSPE_ENABLE); in hdspe_start_audio() 227 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register); in hdspe_start_audio() 237 sc->ctrl_register &= ~(HDSPE_AUDIO_INT_ENABLE | HDSPE_ENABLE); in hdspe_stop_audio() 238 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register); in hdspe_stop_audio() 486 sc->ctrl_register &= ~HDSPE_FREQ_MASK; in hdspechan_setspeed() 487 sc->ctrl_register |= hr->reg; in hdspechan_setspeed() 488 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register); in hdspechan_setspeed() 548 sc->ctrl_register &= ~HDSPE_LAT_MASK; in hdspechan_setblocksize() 549 sc->ctrl_register |= hdspe_encode_latency(hl->n); in hdspechan_setblocksize() 550 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register); in hdspechan_setblocksize()
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H A D | hdspe.c | 247 sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER; in hdspe_init() 251 sc->ctrl_register = hdspe_encode_latency(7); in hdspe_init() 255 sc->ctrl_register &= ~HDSPE_FREQ_MASK; in hdspe_init() 256 sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT; in hdspe_init() 257 hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register); in hdspe_init()
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H A D | hdspe.h | 142 uint32_t ctrl_register; member
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