Searched refs:dcfclk_khz (Results 1 – 5 of 5) sorted by relevance
590 || new_clocks->dcfclk_khz > dccg->clks.dcfclk_khz) in dcn1_update_clocks()609 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, dccg->clks.dcfclk_khz)) { in dcn1_update_clocks()610 dccg->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn1_update_clocks()611 smu_req.hard_min_dcefclk_khz = new_clocks->dcfclk_khz; in dcn1_update_clocks()
357 context->bw.dcn.clk.dcfclk_khz, in context_clock_trace()365 context->bw.dcn.clk.dcfclk_khz, in context_clock_trace()
206 int dcfclk_khz; member
344 dc->current_state->bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()2237 pp_display_cfg->min_engine_clock_khz = dc->res_pool->dccg->clks.dcfclk_khz; in dcn10_pplib_apply_display_requirements()2241 pp_display_cfg->min_dcfclock_khz = dc->res_pool->dccg->clks.dcfclk_khz; in dcn10_pplib_apply_display_requirements()
1049 context->bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()1310 dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz); in dcn_find_dcfclk_suits_all()