Searched refs:dcfclkv_min0p65 (Results 1 – 2 of 2) sorted by relevance
69 .dcfclkv_min0p65 = 300, /* MHz, = 3600/12, bypass */591 v->dcfclk_per_state[0] = v->dcfclkv_min0p65;719 v->dcfclkv_min0p65 = dc->dcn_soc->dcfclkv_min0p65; in dcn_validate_bandwidth()807 v->dcfclk_per_state[0] = v->dcfclkv_min0p65; in dcn_validate_bandwidth()1276 } else if (clocks_in_khz > dc->dcn_soc->dcfclkv_min0p65*1000) { in dcn_find_normalized_clock_vdd_Level()1324 dcf_clk = dc->dcn_soc->dcfclkv_min0p65*1000; in dcn_find_dcfclk_suits_all()1398 dc->dcn_soc->dcfclkv_min0p65 = dcfclks.data[0].clocks_in_khz / 1000.0; in dcn_bw_update_from_pplib()1420 min_dcfclk_khz = dc->dcn_soc->dcfclkv_min0p65 * 1000; in dcn_bw_notify_pplib_of_wm_ranges()1517 dc->dcn_soc->dcfclkv_min0p65 * 1000, in dcn_bw_sync_calcs_and_dml()
118 float dcfclkv_min0p65; member555 float dcfclkv_min0p65; /*MHz*/ member