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Searched refs:disp_int (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drs600.c714 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); in rs600_irq_ack()
715 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
719 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
723 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
728 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
734 rdev->irq.stat_regs.r500.disp_int = 0; in rs600_irq_ack()
774 !rdev->irq.stat_regs.r500.disp_int && in rs600_irq_process()
779 rdev->irq.stat_regs.r500.disp_int || in rs600_irq_process()
786 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
795 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
[all …]
H A Dr600.c3955 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) in r600_irq_ack()
3957 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) in r600_irq_ack()
3959 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) in r600_irq_ack()
3961 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) in r600_irq_ack()
3963 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { in r600_irq_ack()
3974 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { in r600_irq_ack()
4159 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in r600_irq_process()
4167 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VLINE_INTERRUPT; in r600_irq_process()
4197 rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VLINE_INTERRUPT; in r600_irq_process()
4222 rdev->irq.stat_regs.r600.disp_int &= ~DC_HPD1_INTERRUPT; in r600_irq_process()
[all …]
H A Devergreen.c4597 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_ack() local
4601 disp_int[i] = RREG32(evergreen_disp_int_status[i]); in evergreen_irq_ack()
4616 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in evergreen_irq_ack()
4619 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in evergreen_irq_ack()
4626 if (disp_int[i] & DC_HPD1_INTERRUPT) in evergreen_irq_ack()
4631 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in evergreen_irq_ack()
4684 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_process() local
4756 if (!(disp_int[crtc_idx] & mask)) { in evergreen_irq_process()
4761 disp_int[crtc_idx] &= ~mask; in evergreen_irq_process()
4794 if (!(disp_int[hpd_idx] & mask)) in evergreen_irq_process()
[all …]
H A Dsi.c6134 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_ack() local
6141 disp_int[i] = RREG32(si_disp_int_status[i]); in si_irq_ack()
6155 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in si_irq_ack()
6158 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in si_irq_ack()
6165 if (disp_int[i] & DC_HPD1_INTERRUPT) in si_irq_ack()
6170 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in si_irq_ack()
6233 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_process() local
6304 if (!(disp_int[crtc_idx] & mask)) { in si_irq_process()
6309 disp_int[crtc_idx] &= ~mask; in si_irq_process()
6342 if (!(disp_int[hpd_idx] & mask)) in si_irq_process()
[all …]
H A Dcik.c7268 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); in cik_irq_ack()
7299 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) in cik_irq_ack()
7301 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) in cik_irq_ack()
7342 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { in cik_irq_ack()
7372 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { in cik_irq_ack()
7573 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in cik_irq_process()
7581 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; in cik_irq_process()
7753 if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT)) in cik_irq_process()
7756 rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_INTERRUPT; in cik_irq_process()
7807 if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT)) in cik_irq_process()
[all …]
H A Dradeon.h763 u32 disp_int; member
768 u32 disp_int; member
778 u32 disp_int[6]; member
784 u32 disp_int; member
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c3195 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq() local
3200 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()
3212 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()
3232 uint32_t disp_int, mask; in dce_v10_0_hpd_irq() local
3241 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()
3244 if (disp_int & mask) { in dce_v10_0_hpd_irq()
H A Ddce_v11_0.c3321 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq() local
3327 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3339 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3359 uint32_t disp_int, mask; in dce_v11_0_hpd_irq() local
3368 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()
3371 if (disp_int & mask) { in dce_v11_0_hpd_irq()