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Searched refs:drm_mode_set_crtcinfo (Results 1 – 17 of 17) sorted by relevance

/dragonfly/sys/dev/drm/
H A Ddrm_modes.c810 drm_mode_set_crtcinfo(&adjusted, CRTC_STEREO_DOUBLE_ONLY); in drm_mode_get_hv_timing()
831 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) in drm_mode_set_crtcinfo() function
893 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
1512 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); in drm_mode_create_from_cmdline_mode()
1598 drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V); in drm_mode_convert_umode()
H A Ddrm_probe_helper.c537 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); in drm_helper_probe_single_connector_modes()
/dragonfly/sys/dev/drm/include/drm/
H A Ddrm_modes.h490 void drm_mode_set_crtcinfo(struct drm_display_mode *p,
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_encoders.c173 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); in amdgpu_panel_mode_fixup()
H A Datombios_encoders.c361 drm_mode_set_crtcinfo(adjusted_mode, 0); in amdgpu_atombios_encoder_mode_fixup()
2128 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); in amdgpu_atombios_encoder_get_lcd_info()
H A Damdgpu_connectors.c631 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); in amdgpu_connector_fixup_lcd_native_mode()
/dragonfly/sys/dev/drm/radeon/
H A Dradeon_encoders.c342 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); in radeon_panel_mode_fixup()
H A Dradeon_dp_mst.c530 drm_mode_set_crtcinfo(adjusted_mode, 0); in radeon_mst_mode_fixup()
H A Dradeon_legacy_encoders.c252 drm_mode_set_crtcinfo(adjusted_mode, 0); in radeon_legacy_mode_fixup()
H A Dradeon_connectors.c806 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); in radeon_fixup_lvds_native_mode()
H A Datombios_encoders.c366 drm_mode_set_crtcinfo(adjusted_mode, 0); in radeon_atom_mode_fixup()
H A Dradeon_combios.c1275 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); in radeon_combios_get_lvds_info()
H A Dradeon_atombios.c1679 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); in radeon_atombios_get_lvds_info()
/dragonfly/sys/dev/drm/i915/
H A Dintel_panel.c46 drm_mode_set_crtcinfo(adjusted_mode, 0); in intel_fixed_panel_mode()
H A Dintel_sdvo.c901 drm_mode_set_crtcinfo(&mode, 0); in intel_sdvo_get_mode_from_dtd()
H A Dintel_display.c10917 drm_mode_set_crtcinfo(&pipe_config->base.adjusted_mode, in intel_modeset_pipe_config()
/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c2639 drm_mode_set_crtcinfo(&mode, 0); in create_stream_for_sink()