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Searched refs:engine_max_clock (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c329 validation_clks.engine_max_clock = 72000; in dm_pp_get_clock_levels_by_type()
337 validation_clks.engine_max_clock); in dm_pp_get_clock_levels_by_type()
344 validation_clks.engine_max_clock *= 10; in dm_pp_get_clock_levels_by_type()
350 if (dc_clks->clocks_in_khz[i] > validation_clks.engine_max_clock) { in dm_pp_get_clock_levels_by_type()
/dragonfly/sys/dev/drm/amd/include/
H A Ddm_pp_interface.h114 uint32_t engine_max_clock; member
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu8_hwmgr.c1477 info->engine_max_clock = limits->sclk; in smu8_get_dal_power_level()
1641 clocks->engine_max_clock = table->entries[level].clk; in smu8_get_max_high_clocks()
1643 clocks->engine_max_clock = table->entries[table->count - 1].clk; in smu8_get_max_high_clocks()
H A Dsmu10_hwmgr.c1065 clocks->engine_max_clock = 80000; /* driver can't get engine clock, temp hard code to 800MHz */ in smu10_get_max_high_clocks()
H A Dvega12_hwmgr.c1603 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()
H A Dvega10_hwmgr.c4076 info->engine_max_clock = max_limits->sclk; in vega10_get_dal_power_level()
H A Dsmu7_hwmgr.c4772 clocks->engine_max_clock = sclk_table->count > 1 ? in smu7_get_max_high_clocks()