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Searched refs:fence_size (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Di915_gem_fence_reg.c84 GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I965_FENCE_PAGE)); in i965_write_fence_reg()
87 val = (vma->node.start + vma->fence_size - I965_FENCE_PAGE) << 32; in i965_write_fence_reg()
129 GEM_BUG_ON(!is_power_of_2(vma->fence_size)); in i915_write_fence_reg()
130 GEM_BUG_ON(!IS_ALIGNED(vma->node.start, vma->fence_size)); in i915_write_fence_reg()
141 val |= I915_FENCE_SIZE_BITS(vma->fence_size); in i915_write_fence_reg()
167 GEM_BUG_ON(!is_power_of_2(vma->fence_size)); in i830_write_fence_reg()
169 GEM_BUG_ON(!IS_ALIGNED(vma->node.start, vma->fence_size)); in i830_write_fence_reg()
174 val |= I830_FENCE_SIZE_BITS(vma->fence_size); in i830_write_fence_reg()
H A Di915_vma.c131 vma->fence_size = i915_gem_fence_size(vm->i915, vma->size, in vma_create()
134 if (unlikely(vma->fence_size < vma->size || /* overflow */ in vma_create()
135 vma->fence_size > vm->total)) in vma_create()
138 GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT)); in vma_create()
392 GEM_BUG_ON(!vma->fence_size); in __i915_vma_set_map_and_fenceable()
401 fenceable = (vma->node.size >= vma->fence_size && in __i915_vma_set_map_and_fenceable()
404 mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end; in __i915_vma_set_map_and_fenceable()
475 size = max_t(typeof(size), size, vma->fence_size); in i915_vma_insert()
H A Di915_vma.h60 u32 fence_size; member
H A Di915_gem_tiling.c292 vma->fence_size = in i915_gem_object_set_tiling()
H A Di915_gem.c4450 vma->fence_size > dev_priv->ggtt.mappable_end / 2) in i915_gem_object_ggtt_pin()