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Searched refs:i915_vma_pin (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Di915_gem_render_state.c235 ret = i915_vma_pin(so->vma, 0, 0, PIN_GLOBAL | PIN_HIGH); in i915_gem_render_state_emit()
H A Di915_vma.h273 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) in i915_vma_pin() function
H A Dintel_guc.c346 ret = i915_vma_pin(vma, 0, PAGE_SIZE, in intel_guc_allocate_vma()
H A Dintel_ringbuffer.c1236 ret = i915_vma_pin(vma, 0, PAGE_SIZE, flags); in intel_ring_pin()
1372 return i915_vma_pin(vma, 0, I915_GTT_MIN_ALIGNMENT, in context_pin()
1916 ret = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH); in intel_ring_init_semaphores()
H A Di915_gem_execbuffer.c366 if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags))) in eb_pin_vma()
556 err = i915_vma_pin(vma, in eb_reserve_vma()
1098 err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); in __reloc_gpu_alloc()
H A Dintel_engine_cs.c461 ret = i915_vma_pin(vma, 0, 4096, PIN_GLOBAL | PIN_HIGH); in intel_engine_create_scratch()
548 ret = i915_vma_pin(vma, 0, 4096, flags); in init_status_page()
H A Dintel_lrc.c1101 ret = i915_vma_pin(ce->state, 0, GEN8_LR_CONTEXT_ALIGN, flags); in execlists_context_pin()
1361 err = i915_vma_pin(vma, 0, PAGE_SIZE, PIN_GLOBAL | PIN_HIGH); in lrc_setup_wa_ctx()
H A Di915_gem.c4466 ret = i915_vma_pin(vma, size, alignment, flags | PIN_GLOBAL); in i915_gem_object_ggtt_pin()