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Searched refs:ib_cntl (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsdma_v2_4.c337 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_stop() local
348 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
349 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v2_4_gfx_stop()
350 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_stop()
407 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_resume() local
466 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
467 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v2_4_gfx_resume()
469 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v2_4_gfx_resume()
472 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_resume()
H A Dsdma_v3_0.c512 u32 rb_cntl, ib_cntl; in sdma_v3_0_gfx_stop() local
523 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_stop()
524 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v3_0_gfx_stop()
525 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_stop()
643 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v3_0_gfx_resume() local
735 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
736 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v3_0_gfx_resume()
738 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v3_0_gfx_resume()
741 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_resume()
H A Dsdma_v4_0.c498 u32 rb_cntl, ib_cntl; in sdma_v4_0_gfx_stop() local
509 ib_cntl = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v4_0_gfx_stop()
510 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v4_0_gfx_stop()
511 WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v4_0_gfx_stop()
620 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_0_gfx_resume() local
723 ib_cntl = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v4_0_gfx_resume()
724 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v4_0_gfx_resume()
726 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v4_0_gfx_resume()
729 WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v4_0_gfx_resume()
/dragonfly/sys/dev/drm/radeon/
H A Dr600_dma.c121 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local
152 ib_cntl = DMA_IB_ENABLE; in r600_dma_resume()
154 ib_cntl |= DMA_IB_SWAP_ENABLE; in r600_dma_resume()
156 WREG32(DMA_IB_CNTL, ib_cntl); in r600_dma_resume()
H A Dni_dma.c188 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local
231 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in cayman_dma_resume()
233 ib_cntl |= DMA_IB_SWAP_ENABLE; in cayman_dma_resume()
235 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
H A Dcik_sdma.c366 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
415 ib_cntl = SDMA_IB_ENABLE; in cik_sdma_gfx_resume()
417 ib_cntl |= SDMA_IB_SWAP_ENABLE; in cik_sdma_gfx_resume()
420 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()