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Searched refs:ixAZALIA_CRC1_CHANNEL5 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5468 #define ixAZALIA_CRC1_CHANNEL5 0x5 macro
H A Ddce_10_0_d.h6739 #define ixAZALIA_CRC1_CHANNEL5 0x5 macro
H A Ddce_11_0_d.h6901 #define ixAZALIA_CRC1_CHANNEL5 0x5 macro
H A Ddce_11_2_d.h8246 #define ixAZALIA_CRC1_CHANNEL5 0x5 macro
H A Ddce_12_0_offset.h18127 #define ixAZALIA_CRC1_CHANNEL5 … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h13087 #define ixAZALIA_CRC1_CHANNEL5 … macro