Searched refs:ixDIDT_TCP_CTRL0 (Results 1 – 9 of 9) sorted by relevance
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
H A D | smu7_powertune.c | 228 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_EN_MASK, DIDT_… 229 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__USE_REF_CLOCK_MASK, DIDT_… 230 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_… 231 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_RST_MASK, DIDT_… 232 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CLK_EN_OVERRIDE_MASK, DIDT_… 233 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_MAX_STALLS_ALLOWED_HI_MASK, DIDT_… 234 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_MAX_STALLS_ALLOWED_LO_MASK, DIDT_… 235 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__UNUSED_0_MASK, DIDT_… 370 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_EN_MASK, DIDT_… 371 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__USE_REF_CLOCK_MASK, DIDT_… [all …]
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H A D | vega10_powertune.c | 234 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_EN_MASK, DIDT_TCP_CTRL0__DIDT_CTR… 235 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__PHASE_OFFSET_MASK, DIDT_TCP_CTRL0__PHASE_OF… 236 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CTRL_RST_MASK, DIDT_TCP_CTRL0__DIDT_CT… 237 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_CLK_EN_OVERRIDE_MASK, DIDT_TCP_CTRL0__… 238 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_STALL_CTRL_EN_MASK, DIDT_TCP_CTRL0__DI… 239 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_TUNING_CTRL_EN_MASK, DIDT_TCP_CTRL0__D… 240 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_STALL_AUTO_RELEASE_EN_MASK, DIDT_TCP_C… 241 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_HI_POWER_THRESHOLD_MASK, DIDT_TCP_CTRL… 242 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_AUTO_MPD_EN_MASK, DIDT_TCP_CTRL0__DIDT… 243 …{ ixDIDT_TCP_CTRL0, DIDT_TCP_CTRL0__DIDT_STALL_EVENT_EN_MASK, DIDT_TCP_CTRL0__D… [all …]
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
H A D | gfx_7_0_d.h | 2525 #define ixDIDT_TCP_CTRL0 0x60 macro
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H A D | gfx_7_2_d.h | 2550 #define ixDIDT_TCP_CTRL0 0x60 macro
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H A D | gfx_8_0_d.h | 2798 #define ixDIDT_TCP_CTRL0 0x60 macro
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H A D | gfx_8_1_d.h | 2776 #define ixDIDT_TCP_CTRL0 0x60 macro
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 7157 #define ixDIDT_TCP_CTRL0 … macro
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H A D | gc_9_1_offset.h | 7420 #define ixDIDT_TCP_CTRL0 … macro
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H A D | gc_9_2_1_offset.h | 7457 #define ixDIDT_TCP_CTRL0 … macro
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