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Searched refs:ixLCAC_MC0_OVR_VAL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h28 #define ixLCAC_MC0_OVR_VAL 0x011E macro
H A Dsmu_8_0_d.h634 #define ixLCAC_MC0_OVR_VAL 0xd0208138 macro
H A Dsmu_7_0_0_d.h727 #define ixLCAC_MC0_OVR_VAL 0xc0400d38 macro
H A Dsmu_7_1_1_d.h1027 #define ixLCAC_MC0_OVR_VAL 0xc0400138 macro
H A Dsmu_7_0_1_d.h1216 #define ixLCAC_MC0_OVR_VAL 0xc0400d38 macro
H A Dsmu_7_1_2_d.h1177 #define ixLCAC_MC0_OVR_VAL 0xc0400138 macro
H A Dsmu_7_1_3_d.h1109 #define ixLCAC_MC0_OVR_VAL 0xc0400138 macro
H A Dsmu_7_1_0_d.h1246 #define ixLCAC_MC0_OVR_VAL 0xc0400d38 macro