Home
last modified time | relevance | path

Searched refs:ixLCAC_MC2_OVR_SEL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h33 #define ixLCAC_MC2_OVR_SEL 0x0123 macro
H A Dsmu_8_0_d.h639 #define ixLCAC_MC2_OVR_SEL 0xd020814c macro
H A Dsmu_7_0_0_d.h732 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c macro
H A Dsmu_7_1_1_d.h1032 #define ixLCAC_MC2_OVR_SEL 0xc040014c macro
H A Dsmu_7_0_1_d.h1221 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c macro
H A Dsmu_7_1_2_d.h1182 #define ixLCAC_MC2_OVR_SEL 0xc040014c macro
H A Dsmu_7_1_3_d.h1114 #define ixLCAC_MC2_OVR_SEL 0xc040014c macro
H A Dsmu_7_1_0_d.h1251 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c macro