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Searched refs:ixLCAC_MC3_OVR_SEL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h36 #define ixLCAC_MC3_OVR_SEL 0x0126 macro
H A Dsmu_8_0_d.h642 #define ixLCAC_MC3_OVR_SEL 0xd0208158 macro
H A Dsmu_7_0_0_d.h735 #define ixLCAC_MC3_OVR_SEL 0xc0400d58 macro
H A Dsmu_7_1_1_d.h1035 #define ixLCAC_MC3_OVR_SEL 0xc0400158 macro
H A Dsmu_7_0_1_d.h1224 #define ixLCAC_MC3_OVR_SEL 0xc0400d58 macro
H A Dsmu_7_1_2_d.h1185 #define ixLCAC_MC3_OVR_SEL 0xc0400158 macro
H A Dsmu_7_1_3_d.h1117 #define ixLCAC_MC3_OVR_SEL 0xc0400158 macro
H A Dsmu_7_1_0_d.h1254 #define ixLCAC_MC3_OVR_SEL 0xc0400d58 macro