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Searched refs:ixSQ_WAVE_TTMP5 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h102 #define ixSQ_WAVE_TTMP5 0x0275 macro
H A Dgfx_7_0_d.h1930 #define ixSQ_WAVE_TTMP5 0x275 macro
H A Dgfx_7_2_d.h1951 #define ixSQ_WAVE_TTMP5 0x275 macro
H A Dgfx_8_0_d.h2150 #define ixSQ_WAVE_TTMP5 0x275 macro
H A Dgfx_8_1_d.h2118 #define ixSQ_WAVE_TTMP5 0x275 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7053 #define ixSQ_WAVE_TTMP5 … macro
H A Dgc_9_1_offset.h7318 #define ixSQ_WAVE_TTMP5 … macro
H A Dgc_9_2_1_offset.h7357 #define ixSQ_WAVE_TTMP5 … macro