| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | dce_v10_0.c | 693 u32 lb_size; /* line buffer allocated to pipe */ member
977 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v10_0_check_latency_hiding()
1014 u32 lb_size, u32 num_heads) in dce_v10_0_program_watermarks() argument
1053 wm_high.lb_size = lb_size; in dce_v10_0_program_watermarks()
1092 wm_low.lb_size = lb_size; in dce_v10_0_program_watermarks()
1107 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v10_0_program_watermarks()
1147 u32 num_heads = 0, lb_size; in dce_v10_0_bandwidth_update() local
1158 lb_size = dce_v10_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v10_0_bandwidth_update()
1160 lb_size, num_heads); in dce_v10_0_bandwidth_update()
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| H A D | dce_v11_0.c | 719 u32 lb_size; /* line buffer allocated to pipe */ member
1003 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v11_0_check_latency_hiding()
1040 u32 lb_size, u32 num_heads) in dce_v11_0_program_watermarks() argument
1079 wm_high.lb_size = lb_size; in dce_v11_0_program_watermarks()
1118 wm_low.lb_size = lb_size; in dce_v11_0_program_watermarks()
1133 lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce_v11_0_program_watermarks()
1173 u32 num_heads = 0, lb_size; in dce_v11_0_bandwidth_update() local
1184 lb_size = dce_v11_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); in dce_v11_0_bandwidth_update()
1186 lb_size, num_heads); in dce_v11_0_bandwidth_update()
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| /dragonfly/sys/dev/drm/radeon/ |
| H A D | evergreen.c | 1925 u32 lb_size; /* line buffer allocated to pipe */ member
2110 u32 lb_partitions = wm->lb_size / wm->src_width; in evergreen_check_latency_hiding()
2136 u32 lb_size, u32 num_heads) in evergreen_program_watermarks() argument
2184 wm_high.lb_size = lb_size; in evergreen_program_watermarks()
2211 wm_low.lb_size = lb_size; in evergreen_program_watermarks()
2262 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in evergreen_program_watermarks()
2307 u32 num_heads = 0, lb_size; in evergreen_bandwidth_update() local
2322 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in evergreen_bandwidth_update()
2323 evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in evergreen_bandwidth_update()
2324 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in evergreen_bandwidth_update()
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| H A D | rs690.c | 210 u32 lb_size = 8192; in rs690_line_buffer_adjust() local
251 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in rs690_line_buffer_adjust()
254 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in rs690_line_buffer_adjust()
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| H A D | si.c | 2055 u32 lb_size; /* line buffer allocated to pipe */ member
2260 u32 lb_partitions = wm->lb_size / wm->src_width; in dce6_check_latency_hiding()
2286 u32 lb_size, u32 num_heads) in dce6_program_watermarks() argument
2337 wm_high.lb_size = lb_size; in dce6_program_watermarks()
2364 wm_low.lb_size = lb_size; in dce6_program_watermarks()
2417 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce6_program_watermarks()
2454 u32 num_heads = 0, lb_size; in dce6_bandwidth_update() local
2469 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in dce6_bandwidth_update()
2470 dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in dce6_bandwidth_update()
2471 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in dce6_bandwidth_update()
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| H A D | cik.c | 8896 u32 lb_size; /* line buffer allocated to pipe */ member
9180 u32 lb_partitions = wm->lb_size / wm->src_width; in dce8_check_latency_hiding()
9217 u32 lb_size, u32 num_heads) in dce8_program_watermarks() argument
9257 wm_high.lb_size = lb_size; in dce8_program_watermarks()
9297 wm_low.lb_size = lb_size; in dce8_program_watermarks()
9314 radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay); in dce8_program_watermarks()
9354 u32 num_heads = 0, lb_size; in dce8_bandwidth_update() local
9368 lb_size = dce8_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode); in dce8_bandwidth_update()
9369 dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); in dce8_bandwidth_update()
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| H A D | r100.c | 3230 u32 lb_size = 8192; in r100_bandwidth_update() local
3655 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in r100_bandwidth_update()
3658 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in r100_bandwidth_update()
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| /dragonfly/sys/vfs/udf/ |
| H A D | ecma167-udf.h | 191 uint32_t lb_size; member
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| H A D | udf_vfsops.c | 306 udfmp->bsize = lvd->lb_size; in udf_mountfs()
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