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Searched refs:max_clks_state (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_clocks.c220 for (i = clk->max_clks_state; i >= DM_PP_CLOCKS_STATE_ULTRA_LOW; i--) in dce_get_required_clocks_state()
228 if (low_req_clk > clk->max_clks_state) { in dce_get_required_clocks_state()
230 if (clk_dce->max_clks_by_state[clk->max_clks_state].display_clk_khz in dce_get_required_clocks_state()
234 low_req_clk = clk->max_clks_state; in dce_get_required_clocks_state()
734 base->max_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce_dccg_construct()
/dragonfly/sys/dev/drm/amd/display/dc/inc/hw/
H A Ddisplay_clock.h43 enum dm_pp_clocks_state max_clks_state; member
/dragonfly/sys/dev/drm/amd/display/dc/dce80/
H A Ddce80_resource.c899 pool->base.dccg->max_clks_state = in dce80_construct()
1093 pool->base.dccg->max_clks_state = in dce81_construct()
1275 pool->base.dccg->max_clks_state = in dce83_construct()
/dragonfly/sys/dev/drm/amd/display/dc/dce100/
H A Ddce100_resource.c911 pool->base.dccg->max_clks_state = in construct()
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_resource.c1253 pool->base.dccg->max_clks_state = in construct()
/dragonfly/sys/dev/drm/amd/display/dc/dce112/
H A Ddce112_resource.c1202 pool->base.dccg->max_clks_state = in construct()