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Searched refs:min_sclk (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dtrinity_dpm.h79 u32 min_sclk; member
H A Dtrinity_dpm.c1408 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_patch_thermal_state()
1547 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in trinity_apply_state_adjust_rules() local
1548 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_apply_state_adjust_rules()
1571 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1573 trinity_get_valid_engine_clock(rdev, min_sclk); in trinity_apply_state_adjust_rules()
1870 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock); in trinity_parse_sys_info_table()
H A Dsumo_dpm.c1050 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_patch_thermal_state()
1097 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in sumo_apply_state_adjust_rules() local
1098 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_apply_state_adjust_rules()
1118 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1120 sumo_get_valid_engine_clock(rdev, min_sclk); in sumo_apply_state_adjust_rules()
1677 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock); in sumo_parse_sys_info_table()
H A Dsumo_dpm.h82 u32 min_sclk; member
H A Dni_dpm.c2458 u32 min_sclk; in ni_populate_power_containment_values() local
2509 min_sclk = max_sclk; in ni_populate_power_containment_values()
2511 min_sclk = prev_sclk; in ni_populate_power_containment_values()
2513 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in ni_populate_power_containment_values()
2515 if (min_sclk < state->performance_levels[0].sclk) in ni_populate_power_containment_values()
2516 min_sclk = state->performance_levels[0].sclk; in ni_populate_power_containment_values()
2518 if (min_sclk == 0) in ni_populate_power_containment_values()
2522 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()
H A Dsi_dpm.c2296 u32 min_sclk; in si_populate_power_containment_values() local
2336 min_sclk = max_sclk; in si_populate_power_containment_values()
2338 min_sclk = prev_sclk; in si_populate_power_containment_values()
2340 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2343 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2344 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2346 if (min_sclk == 0) in si_populate_power_containment_values()
2370 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
H A Dkv_dpm.c2140 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2159 sclk = min_sclk; in kv_apply_state_adjust_rules()
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dvega12_hwmgr.c701 hwmgr->default_compute_power_profile.min_sclk =
2208 uint32_t min_sclk, uint32_t min_mclk)
2216 dpm_table->gfx_table.dpm_levels[i].value >= min_sclk) {
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.c2393 u32 min_sclk; in si_populate_power_containment_values() local
2433 min_sclk = max_sclk; in si_populate_power_containment_values()
2435 min_sclk = prev_sclk; in si_populate_power_containment_values()
2437 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2439 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2440 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2442 if (min_sclk == 0) in si_populate_power_containment_values()
2466 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()