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Searched refs:mmATC_L2_CNTL2 (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_d.h495 #define mmATC_L2_CNTL2 0xcd6 macro
H A Dgmc_8_2_d.h542 #define mmATC_L2_CNTL2 0xcd6 macro
H A Dgmc_7_1_d.h527 #define mmATC_L2_CNTL2 0xcd6 macro
H A Dgmc_8_1_d.h540 #define mmATC_L2_CNTL2 0xcd6 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_offset.h1240 #define mmATC_L2_CNTL2 … macro
H A Dmmhub_9_1_offset.h1272 #define mmATC_L2_CNTL2 … macro
H A Dmmhub_9_3_0_offset.h1256 #define mmATC_L2_CNTL2 … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1118 #define mmATC_L2_CNTL2 … macro
H A Dgc_9_1_offset.h1162 #define mmATC_L2_CNTL2 … macro
H A Dgc_9_2_1_offset.h1100 #define mmATC_L2_CNTL2 … macro