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Searched refs:mmBIF_VDDGFX_GFX5_LOWER (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_d.h114 #define mmBIF_VDDGFX_GFX5_LOWER 0x1432 macro
H A Dbif_5_1_d.h106 #define mmBIF_VDDGFX_GFX5_LOWER 0x1432 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h879 #define mmBIF_VDDGFX_GFX5_LOWER … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2514 #define mmBIF_VDDGFX_GFX5_LOWER … macro
H A Dnbio_7_0_offset.h4398 #define mmBIF_VDDGFX_GFX5_LOWER … macro