Searched refs:mmBPHYC_PLL1_VGA25_PPLL_POST_DIV (Results 1 – 2 of 2) sorted by relevance
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/ | ||
H A D | dce_10_0_d.h | 6139 #define mmBPHYC_PLL1_VGA25_PPLL_POST_DIV 0x1742 macro |
H A D | dce_11_0_d.h | 6216 #define mmBPHYC_PLL1_VGA25_PPLL_POST_DIV 0x1742 macro |