Searched refs:mmCGTS_CU0_LDS_SQ_CTRL_REG (Results 1 – 9 of 9) sorted by relevance
/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | mxgpu_vi.c | 172 mmCGTS_CU0_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
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H A D | gfx_v8_0.c | 259 mmCGTS_CU0_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002, 533 mmCGTS_CU0_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002, 629 mmCGTS_CU0_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
H A D | gfx_7_0_d.h | 1486 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
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H A D | gfx_7_2_d.h | 1507 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
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H A D | gfx_8_0_d.h | 1700 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
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H A D | gfx_8_1_d.h | 1668 #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0xf009 macro
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 6253 #define mmCGTS_CU0_LDS_SQ_CTRL_REG … macro
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H A D | gc_9_1_offset.h | 6532 #define mmCGTS_CU0_LDS_SQ_CTRL_REG … macro
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H A D | gc_9_2_1_offset.h | 6544 #define mmCGTS_CU0_LDS_SQ_CTRL_REG … macro
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