Searched refs:mmCGTS_CU5_LDS_SQ_CTRL_REG (Results 1 – 9 of 9) sorted by relevance
| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | mxgpu_vi.c | 197 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
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| H A D | gfx_v8_0.c | 284 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
558 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
654 mmCGTS_CU5_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 1511 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
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| H A D | gfx_7_2_d.h | 1532 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
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| H A D | gfx_8_0_d.h | 1725 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
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| H A D | gfx_8_1_d.h | 1693 #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0xf022 macro
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 6303 #define mmCGTS_CU5_LDS_SQ_CTRL_REG … macro
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| H A D | gc_9_1_offset.h | 6582 #define mmCGTS_CU5_LDS_SQ_CTRL_REG … macro
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| H A D | gc_9_2_1_offset.h | 6594 #define mmCGTS_CU5_LDS_SQ_CTRL_REG … macro
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