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Searched refs:mmCP_CEQ2_AVAIL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h382 #define mmCP_CEQ2_AVAIL 0x21E7 macro
H A Dgfx_7_0_d.h552 #define mmCP_CEQ2_AVAIL 0x21e7 macro
H A Dgfx_7_2_d.h565 #define mmCP_CEQ2_AVAIL 0x21e7 macro
H A Dgfx_8_0_d.h618 #define mmCP_CEQ2_AVAIL 0x21e7 macro
H A Dgfx_8_1_d.h618 #define mmCP_CEQ2_AVAIL 0x21e7 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h250 #define mmCP_CEQ2_AVAIL … macro
H A Dgc_9_1_offset.h250 #define mmCP_CEQ2_AVAIL … macro
H A Dgc_9_2_1_offset.h244 #define mmCP_CEQ2_AVAIL … macro