Home
last modified time | relevance | path

Searched refs:mmCP_CPC_IC_BASE_HI (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dpolaris10_pwrvirus.h59 { 0x000000b4, mmCP_CPC_IC_BASE_HI },
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dsmu8_smumgr.c213 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); in smu8_load_mec_firmware()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h347 #define mmCP_CPC_IC_BASE_HI 0x30ba macro
H A Dgfx_8_1_d.h347 #define mmCP_CPC_IC_BASE_HI 0x30ba macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2561 #define mmCP_CPC_IC_BASE_HI … macro
H A Dgc_9_1_offset.h2870 #define mmCP_CPC_IC_BASE_HI … macro
H A Dgc_9_2_1_offset.h2804 #define mmCP_CPC_IC_BASE_HI … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v9_0.c2563 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, in gfx_v9_0_cp_compute_load_microcode()