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Searched refs:mmCP_CPC_IC_BASE_LO (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dpolaris10_pwrvirus.h58 { 0x540ff000, mmCP_CPC_IC_BASE_LO },
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dsmu8_smumgr.c209 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); in smu8_load_mec_firmware()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h346 #define mmCP_CPC_IC_BASE_LO 0x30b9 macro
H A Dgfx_8_1_d.h346 #define mmCP_CPC_IC_BASE_LO 0x30b9 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2559 #define mmCP_CPC_IC_BASE_LO … macro
H A Dgc_9_1_offset.h2868 #define mmCP_CPC_IC_BASE_LO … macro
H A Dgc_9_2_1_offset.h2802 #define mmCP_CPC_IC_BASE_LO … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v9_0.c2561 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, in gfx_v9_0_cp_compute_load_microcode()