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Searched refs:mmCP_HQD_HQ_CONTROL1 (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h669 #define mmCP_HQD_HQ_CONTROL1 0x3269 macro
H A Dgfx_8_1_d.h669 #define mmCP_HQD_HQ_CONTROL1 0x3269 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2833 #define mmCP_HQD_HQ_CONTROL1 … macro
H A Dgc_9_1_offset.h3118 #define mmCP_HQD_HQ_CONTROL1 … macro
H A Dgc_9_2_1_offset.h3074 #define mmCP_HQD_HQ_CONTROL1 … macro