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Searched refs:mmCP_INT_CNTL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h437 #define mmCP_INT_CNTL 0x3049 macro
H A Dgfx_7_0_d.h221 #define mmCP_INT_CNTL 0x3049 macro
H A Dgfx_7_2_d.h221 #define mmCP_INT_CNTL 0x3049 macro
H A Dgfx_8_0_d.h245 #define mmCP_INT_CNTL 0x3049 macro
H A Dgfx_8_1_d.h246 #define mmCP_INT_CNTL 0x3049 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2348 #define mmCP_INT_CNTL macro
H A Dgc_9_1_offset.h2662 #define mmCP_INT_CNTL macro
H A Dgc_9_2_1_offset.h2600 #define mmCP_INT_CNTL macro