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Searched refs:mmCP_ME1_PIPE0_PRIORITY (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h285 #define mmCP_ME1_PIPE0_PRIORITY 0x309a macro
H A Dgfx_7_2_d.h287 #define mmCP_ME1_PIPE0_PRIORITY 0x309a macro
H A Dgfx_8_0_d.h318 #define mmCP_ME1_PIPE0_PRIORITY 0x309a macro
H A Dgfx_8_1_d.h318 #define mmCP_ME1_PIPE0_PRIORITY 0x309a macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2497 #define mmCP_ME1_PIPE0_PRIORITY … macro
H A Dgc_9_1_offset.h2806 #define mmCP_ME1_PIPE0_PRIORITY … macro
H A Dgc_9_2_1_offset.h2740 #define mmCP_ME1_PIPE0_PRIORITY … macro