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Searched refs:mmCP_ME2_PIPE1_PRIORITY (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h291 #define mmCP_ME2_PIPE1_PRIORITY 0x30a0 macro
H A Dgfx_7_2_d.h293 #define mmCP_ME2_PIPE1_PRIORITY 0x30a0 macro
H A Dgfx_8_0_d.h324 #define mmCP_ME2_PIPE1_PRIORITY 0x30a0 macro
H A Dgfx_8_1_d.h324 #define mmCP_ME2_PIPE1_PRIORITY 0x30a0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2509 #define mmCP_ME2_PIPE1_PRIORITY … macro
H A Dgc_9_1_offset.h2818 #define mmCP_ME2_PIPE1_PRIORITY … macro
H A Dgc_9_2_1_offset.h2752 #define mmCP_ME2_PIPE1_PRIORITY … macro