Searched refs:mmCP_MEC_ME1_UCODE_ADDR (Results 1 – 11 of 11) sorted by relevance
| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | psp_v10_0.c | 354 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_ADDR); in psp_v10_0_sram_map()
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| H A D | psp_v3_1.c | 487 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_ADDR); in psp_v3_1_sram_map()
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| H A D | gfx_v9_0.c | 2567 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, in gfx_v9_0_cp_compute_load_microcode()
2573 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, in gfx_v9_0_cp_compute_load_microcode()
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| H A D | gfx_v8_0.c | 4563 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0); in gfx_v8_0_cp_compute_load_microcode()
4566 WREG32(mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version); in gfx_v8_0_cp_compute_load_microcode()
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 250 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
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| H A D | gfx_7_2_d.h | 252 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
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| H A D | gfx_8_0_d.h | 281 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
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| H A D | gfx_8_1_d.h | 282 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 6681 #define mmCP_MEC_ME1_UCODE_ADDR … macro
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| H A D | gc_9_1_offset.h | 6962 #define mmCP_MEC_ME1_UCODE_ADDR … macro
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| H A D | gc_9_2_1_offset.h | 6990 #define mmCP_MEC_ME1_UCODE_ADDR … macro
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