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Searched refs:mmCP_RB_DOORBELL_CONTROL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h266 #define mmCP_RB_DOORBELL_CONTROL 0x3059 macro
H A Dgfx_8_1_d.h267 #define mmCP_RB_DOORBELL_CONTROL 0x3059 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v9_0.c2496 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v9_0_cp_gfx_resume()
2505 WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v9_0_cp_gfx_resume()
H A Dgfx_v8_0.c4443 tmp = RREG32(mmCP_RB_DOORBELL_CONTROL); in gfx_v8_0_set_cpg_door_bell()
4456 WREG32(mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v8_0_set_cpg_door_bell()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2392 #define mmCP_RB_DOORBELL_CONTROL macro
H A Dgc_9_1_offset.h2706 #define mmCP_RB_DOORBELL_CONTROL macro
H A Dgc_9_2_1_offset.h2644 #define mmCP_RB_DOORBELL_CONTROL macro