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Searched refs:mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h670 #define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1bd1 macro
H A Ddce_10_0_d.h773 #define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1bd1 macro
H A Ddce_11_0_d.h652 #define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1bd1 macro
H A Ddce_11_2_d.h659 #define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1bd1 macro
H A Ddce_12_0_offset.h4208 #define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL … macro