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Searched refs:mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h657 #define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1ecf macro
H A Ddce_10_0_d.h758 #define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1dcf macro
H A Ddce_11_0_d.h639 #define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1dcf macro
H A Ddce_11_2_d.h646 #define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1dcf macro
H A Ddce_12_0_offset.h4982 #define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL … macro