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Searched refs:mmCRTC5_CRTC_MASTER_UPDATE_MODE (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h545 #define mmCRTC5_CRTC_MASTER_UPDATE_MODE 0x45be macro
H A Ddce_11_2_d.h552 #define mmCRTC5_CRTC_MASTER_UPDATE_MODE 0x45be macro
H A Ddce_12_0_offset.h8068 #define mmCRTC5_CRTC_MASTER_UPDATE_MODE … macro